ISSCC 2024 Circuit Insights

Written by Morris Fan @Marriott Hotel, San Francisco, Feb. 17, 2024

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ISSCC 2024 Circuit Insights

Fundamentals of Digital Circuit Design

Prof. Jan M. Rabaey, University of California, Berkeley USA

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Compute, Communicate, Acquire/Act

In digital design and computing, we focused on complexity at low cost.

From the lower level to the top: Boolean (0 and 1), logic gate control, processor, and memories to software.

We use VOLTAGE representation for signals (current, flux can also but no). Voltage signals are not ideal since it is affected by the environment, couple, and noises. We define threshold range.

Regeneration: no accumulation of noise in complex circuits.

In the digital world, we view transistors as switches. However, it is not ideal and determines speed (performance) and energy consumption, caused by parasitic caps and resistance (Cs, Cd, Ron, Roff).

Charge and discharge caps, delay

Energy and power:

Modularity and hierarchy:

Timing and Sequential Circuits:

Verification:

Jitter impact: 2 wires too close to each other (coupling caps btw the wires), bad clk, minimize the variance, solve by adding buffers.

Q: Asynchronous clk is not useful since it didn’t have great EDA, is it worth developed?
R: Only triggered when the signal is changing, so the time variance is large, and we are doing worst case circuits, so it’s hard to design timing margin.

Design methodology:

Design productivity: transistor-level => gate level => register transfer level (RTL) => reuse => AI design tools? => AI designing computers? (What’s the rule and the role of the designer?)

Verilog:

Reuse the block
Raising the bar, start using Python, java, tensor flow => the generator (ex. RISC-V)

As we are approaching the physical limitation. The ingenuity of humans and the ingenuity of nature, are there any natural models (different aspects)?

Q: Why don’t we redesign the gate levels to increase the performance? Since you also need to redesign the verifications. choose the now that WINS. Will AI do the verification faster?
R: Cost time and efforts.

Q: Any other physical materials other than silicon to push regeneration. Quantum? Neural?
R: Sometimes you are not able to consider worst case scenario, like Gaussian distribution? Put circuits for detection, error correction to assist design.

Q: Ideas on Moore’s law?
R: Increase density, CFet (PMOS over NMOS).

CMOS Circuit for Biomedical Applications

Prof. Carolina Mora Lopez, IMEC, Leuven, Belgium

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The complexity of the human brain v.s. technology.
Aiming to manage disease, ease pain……

How can we interface with technology?

Problem 1: Electrical noise

Interface with Biology

Problem 2: Electrode DC Offset (EDO)

Biopotential Amplifier General Metrics (Spec of bio-amp)

Complete biopotential readout

  1. Recording electrode
  2. low-noise amp (the one that wants to be optimized) +
  3. filter
  4. programmable gain amplifier
  5. ADC (determine signal quality, how many bits/levels required)(but not over-designed, expensive, enough is enough, more bits
  6. more power needs to compute)

LNA

Differential amplifier
Upper PMOS (Mpi) dominates the noise
To achieve low noise

Multi-channel readout

Multi-channel readout can enable high-density sensing

Neural readout ASIC

Summary
Biopotential are small (uV-mV) and low-frequency (<10kHz) signals

Q: Neural link claimed they have implanted a ‘brain-reading’ device into a person. allowing a person with severe paralysis to control a computer, robotic arm, wheelchair or other device through thought alone. What do you think of the future of putting chips to normal human beings or it should stick with medical usage.
R: Yes, it might happened, this is not the first approach people claims to put chips into human brains. it is high risks procedures, some day it might be in customer electric such as gaming and daily lives.

Q: Battery and power
R: Power supplies, when to charge the device and how often should you charge the device. Noise cancellation to decrease power consumption

Lunch Networking

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The Basic of Ratio Frequency (RF) Circuits

Prof. Hossein Hashemi, University of Southern California, USA

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In the air, EM waves travel at the speed of light.

Modulation is the process of extracting the information signal from a modulated carrier signal.

Radiofrequency transmitter modulator
Radio frequency receiver demodulator

I(t)cos(wt)+Q(t)sin(wt)=a(t)cos(wt+theta(t))I(t)cos(wt) + Q(t)sin(wt) = a(t)cos(wt+theta(t))

The hardest part is power amplifier to transmit the signal over a longer distance.

The problem is that if the device consumes large power, it requires high voltage too. But circuits now consume voltage less than 1V. and the antenna resistance is fixed.
Instead, we use transformers (2 inductors)

Impedance transformer: CM connected to (LM to gnd). Comments “emoter”

Oscillator:

RF Mixers:

Summary:

Q: When the frequency is low enough, we can easily generate sine and cosine. But for higher frequency it is not energy efficient.
R: Information separated to I and Q, multiply with oscillator(carrier wc) in between and add(using KCL) them together.

Q: Driving force between RF industry? pushing frequency higher to get different part of wavelength. Inductors and caps for resonate are large, occupied lots of area. Can we replace inductor?
R: Tunnel creation: focus the beam like a laser, spacial diversity

Q: Negative caps?
R: Noise linearity issue

The Basic of Silicon-Photonic Circuits

Prof. Sudip Shehkar, University of British Columbia, Canada

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Improve performance:

Transceiver:

Miniaturize discrete or bulky components //RF-CMOS

CMOS SOI (Silicon on Insulator)

Enable new application:

CMOS strengths and weaknesses
Great:

Realizing complex functions with billions of transistors on a single chip

Limitation:

Silicon photonics:

Frequency-dependent loss in the Cu channel creates inter-system interferences (ISI)

Loss increases at high rates and loss increases with the length of interconnect => Equalizer helps. But consumes power

Get rid of fiber, instead, using optical fiber for cable (less attenuated), and change the source to laser (tera Hz), couple the laser into photonic chip => silicon photonic

Optical switch (modulator) to block the laser-driven by electronic. (amplitude modulation)

Fiber sending:

Electro-optical link:

Y-branch splitter:

Photodetector/photodiodes (PDs)

Passives:

N is a measure of the reduction of the velocity of light in a medium vs vacuum, v=c/nv=c/n.
Change n to change velocity, l=vt=ct/nl=v*t=c*t/n

Thermal phase shifter (TPS):

High-speed phase shifter:

The diode also has parasitics caps, so we use transmission lines to lower caps or cancel out with inductors.

Put both electronics and photons in Si-process: cointegrated and ……

Biosensors:

Q: Send info with time as reference
R: Synchronize

Pulse amplitude modulation

Noise consideration about the PN junction modulator?

Q: Do I need to worry about refraction?
R: Not a problem for the high-speed circuit. What's the case we want refraction? Surface grating coupling, use it to combine lights.

Copyright © 2024, Chih-Chieh (Morris) Fan
All rights reserved. Please mention my name and source code for reference.